The base circuit cell of the de-cision circuit is source-coupled field-effect transistor logic ( SCFL) circuit. 判决电路的基本单元为源耦合场效应晶体管逻辑(SCFL)电路,时钟提取电路由预处理器和锁相环构成。
A Modified Schottky Transistor Logic Circuit with High Speed and Micropower Consumption 高速微功耗改进型肖特基晶体管逻辑
Three transistor dynamic cells and buffered I/ O control logic are used for the device. The control circuit is optimized for Y C separation system. 电路采用了三管动态存储单元和带缓冲的I/O单元,并针对Y-C分离算法的要求对控制电路进行优化。